1. Field of the Invention
This invention relates to package structures, and, more particularly, to a package structure having a semiconductor chip.
2. Description of Related Art
In the evolution of semiconductor package techniques, in addition to traditional wire bonding and flip-chip techniques, semiconductor device industry has developed a variety of package structures nowadays. For instance, embedding a chip directly in a package substrate may reduce the whole volume of the package structure, enhance electricity capability, and provide flexibility for adapting to various package types. Referring to FIGS. 1A through 1D, a method of fabricating a package structure according to the prior art is shown. As shown in FIG. 1A, a copper substrate 10 that has a first surface 10a and an opposing second surface 10b is provided. A patterned photoresist layer 110 and a resistance layer 111 are formed on the first surface 10a and the second surface 10b, respectively. Next, the substrate 10 is etched to form a disposing trough 12a and a plurality of troughs 12b. As shown in FIG. 1B, a first metal layer 120a is plated on walls of the disposing trough 12a, a second metal layer 120b is plated on walls of the troughs 12b, and then the patterned photoresist layer 110 and the resistance layer 111 are removed. As shown in FIG. 1C, a glue layer 15 is coated on the first metal layer 120a for a semiconductor chip 13 to be disposed thereon. The semiconductor chip 13 has a plurality of electrode pads 130 for electrically connecting to the second metal layer 120b via conductive wires 14. Next, an encapsulant 17 is formed on the copper substrate 10 for encapsulating the semiconductor chip 13 and the conductive wires 14. As shown in FIG. 1D, the copper substrate 10 is removed to expose the first metal layer 120a and the second metal layer 120b. The second metal layer 120b is used as raised connection points 16. The electrode pads 130 on the semiconductor chip 13 are used to externally connect to a printed circuit board via the conductive wires 14 and the raised connection points 16.
However, in the prior art, the disposing trough 12a and the trough 12b are fabricated during an etching process. As a result, the disposing trough 12a and the trough 12b have uneven bottoms, thereby causing unsteadiness and shifting problems to the semiconductor chip 13 while being disposed in the disposing trough 12a. Also, the package body has no strengthened construction formed, and is thus easily deformed due to an external force.
Furthermore, in the etching process of removing the copper substrate 10, more etching time is required due to the thickness difference between the disposing trough 12a and the raised connection points 16, thereby easily causing damages on the first metal layer 120a and the second metal layer 120b. 
Hence, it is a highly urgent technique issue in the industry to provide a package structure capable of avoiding the abovementioned drawbacks of the prior art.